Senior Analog Layout Engineer Locations: Milan, Catania
Time Type: Full time
Posted on: Posted 4 Days Ago
Business Unit Description The business line Advance Analog develops highly integrated solutions for the automotive industry. The central Layout team is delivering SoC layouts to multiple product lines addressing the automotive and industrial applications.
Job Summary We are looking for an experienced (>10 years) IC Analog layout engineer to work with our product organizations, to define and develop the next generation of OBC (On-Board Charger) IPs and products for industrial and consumer applications, within BL AA.
The candidate must have a very good knowledge of Analog layout tools and methodologies used in all layout design phases. The candidate must have a good knowledge of the Analog on Top flow. The experienced candidate will have to drive a team and deliver major contributions at both top and block level of the products.
Responsibilities: Driving/delivering floorplan activities at both IPs and/or SOC level. Participating in the power supply strategy, signals distribution between blocks. Delivering Analog layout blocks and/or top floorplan strategy. Driving the top-level integration using the Mixed Signal on Top flow. Leading a layout team for the SoC execution and scheduling its activities through the project. Running all physical verifications as DRC/LVS/DFM and parasitic extractions to achieve high quality layout deliveries. Participating in design reviews, writing documentation and supporting integration into products. Having a strong focus on design for quality (designs are properly verified, validated, and tested for long-term reliability and zero defect). Identifying root cause and solutions for issues identified on 1st prototypes. Being able to leverage layout expertise to provide technical training and write technical guidelines. The ideal candidate will have: 10+ years of experience leading Analog layout activities in complex ICs. Fluency in Italian and English. Strong expertise in Analog layouts, device physics, and IC ESD protection strategies. Expertise in layout design tools such as Cadence Virtuoso (OA, PVS) and Mentor Graphics (Calibre). Ability to drive and collaborate with experienced people having different technical profiles. Ability to manage and drive a multisite layout team. Experience in delivering advanced floorplan strategies. Experience in physical implementation in Analog blocks at IPs and/or SOC level. Ability to leverage expertise to provide training, support, and write guidelines focused on layout activities. Experience with cross-functional teams and excellent communication skills to operate in a global environment with multiple partners in design, test, program management, and quality department.
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