Internship in the field of Phase Locked Loops in CMOS technology
The Bruno Kessler Foundation is a research and innovation institution based in Trento. The Foundation operates in a plurality of disciplinary fields and aims to achieve excellence in science and technology through 2 science clusters, one dedicated to technology and innovation and one to humanities and social sciences, organized in 12 Research Centers, and with more than 450 researchers. For more information visit here.
In this context, the Integrated Readout ASICs and Image Sensors (IRIS) Research Unit of the Center for Sensors and Devices (SD) deals with the design of integrated circuits in CMOS technology for imaging and other sensing applications, consistent with the Foundation's objectives. More information about the IRIS Research Unit can be found at here.
Planned activitiesThe IRIS Research Unit of the SD-Center is looking for a young recent graduate interested in pursuing an internship experience in the study and design of a Phase Locked Loop (PLL) in CMOS technology. The ideal candidate is a proactive and dynamic young person with good organizational and interpersonal skills, with a propensity for teamwork, motivated to undertake a training experience in an international context.
The intern, working alongside the Research Unit staff, will mainly design an important component of an integrated circuit implementing a PLL. The activity covers the following tasks:
Study the operating principle of a CMOS integrated PLL and the related work.Modeling and developing the architecture of the PLL using Matlab/Simulink tools.Analyze the PLL behavior, especially in terms of dynamic response, SNR, phase noise, frequency noise, stability and bandwidth.Optimize the design. The opportunity to join the team in other active and dynamic projects and to gain experience in a dynamic and challenging environment such as FBK will also be offered during the internship period.
RequirementsB.Sc. or M.Sc. degree in Electrical/Industrial/Telecommunication Engineering, Physics (or similar).Knowledge of major subjects related to electronics, computer science.Fluent knowledge of written and spoken Italian and English (min. level B2).Relational and teamwork skills.Good adaptability, flexibility and initiative skills.Basic knowledge of integrated circuit design.Basic knowledge in the use of Matlab/Simulink. Internship informationInternship start date: from May 2024.
Internship experience duration: 6 months for extra-curricular internships.
Opportunity reserved for thesis students and graduates with a Master's degree (for extra-curricular internships, the degree must not have been obtained more than 12 months ago).
The internship experience will take place at the Science and Technology Cluster at the Povo location. We offer support in finding accommodation at affiliated facilities, in the case of off-site candidates. We offer the possibility to use the internal canteen service. Possible recognition of participation allowance.
How to ApplyAll interested parties are asked to fill out the online form by clicking on "Apply Online" in the "Internship opportunities" section, attaching the following documents in .pdf format:
curriculum vitaemotivational letter For any details about the internship activity, please contact: Massimo Gandola (******)
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