Company Overview
Civitanavi Systems S.p.A. is a leading player in the design, development, and manufacture of high-tech solutions
for Navigation, Control, and Stabilization Systems, for several applications in Aerospace Defense and Industrial
sectors. The application of proprietary methods and technologies, based on FOG (Fiber Optic Gyroscope) and MEMS
(Micro Electro-Mechanical Systems) technology, enables the company to best meet the specific needs of its customers.
Founded as a start-up in 2012 in Italy and now part of Honeywell Group.
Duties and Responsibilities Studying FPGA requirements to understand verification requirements. Working with the FPGA design team to establish test priorities and coverage targets. Defining test procedures. Establishing verification methodology, architecture, and infrastructure including models, generators, monitors, etc. Developing the established test benches using VHDL. Developing FPGA function for HW test purpose. Executing test procedures by simulations and on target tests. Generating reports and verification matrices to ensure coverage of requirements. Reporting code coverage analysis. Reporting RTL bugs and supporting designers to resolve them. Creating and maintaining regressions, providing reports to the team. Supporting project planning efforts and ensuring execution to schedule. Generating and reviewing HW related engineering documentation. Managing documentation and VHDL code in adherence to Configuration Management and Change Control procedures. Conducting or participating in design reviews and supporting customer audits. Managing assigned tasks simultaneously and effectively communicating with the team members, group head, and, if necessary, with all levels of the organization. Qualification and Skills Required: Master's degree in an electronic engineering discipline or similar. Minimum of 3 years of hands-on experience coding, simulating, and verifying VHDL code for FPGA. Experience with EDA tools such as HDL simulators and FPGA design tools. Experience with FPGA testbenches development. Experience with laboratory instruments (power supplies, oscilloscopes, etc). Organized and systematic to maintain documentation in appropriate order. Strong interpersonal and communication skills. Knowledge of English Language, both in writing/reading technical documentation and in speaking/listening during project meetings and design reviews. Preferred: Experience with Mentor Questasim and Xilinx Vivado. Experience with UVM/VMM/OVM Frameworks or System Verilog. Experience with IBM DOORS and Mentor Reqtracer. Experience of version control, e.g., SVN, GIT. Experience with the FPGA design flow (synthesis, place & route, timing closure). Experience with DO-254 standard. Integration experience using SoC (System on Chip) devices, especially Xilinx product family. Benefits and Perks
Free lunch meal, coffee bar, additional health insurance.
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