Digital Verification Engineer M/F

Main ResponsibilitySupport the activity of Design Verification team within RFC-DDC group using the state of art of verification methodology (e.g.
SystemVerilog, UVM, CDCRV, SW Driven Verification, Object Driven verification, Formal verification, scripting) implementing a verification component (VIP)Profile Who are we looking for:basic of digital designbasic of design verificationbasic of SW programmingbasic of scripting languages (sh, csh, python, makefile)knowledge of Verilog and/or Vhdl is considered a plusknowledge of SystemVerilog languages is considered a plusknowledge of Universal Verification Methodology (UVM) is considered a plusWhat we offer:International, multicultural internship in a large high tech multinational, a key player of semiconductor industry.Opportunity to play a role in implementing a transformational change program.Strong development opportunity to be part of various strategic and operational HR initiatives and grow your HR and PM skills.Coaching and guidance from senior resources, interaction with HR and business colleagues, leaders, providers, in order to test and groom your leadership skills.Flexible WorkReimbursement of expensesCompany CanteenCompany Shuttle Free parkingSmart Casual Dress CodePosition location Job locationEurope, Italy, NapoliCandidate criteriaEducation level required: 4 - Bachelor degreeExperience level required: Less than 2 yearsLanguages: English (1- Basic)Requester Desired start date03/06/2024 #J-18808-Ljbffr