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INVENTVM is actively seeking a Digital Backend Design Engineer with previous experience in IC digital design implementation flows for state-of-the-art products and technologies.
Responsibilities: Implement full P&R flow of digital blocks (hierarchical level blocks & top level) from RTL to GDSII, which includes
Synthesis and equivalence check Place & Route Clock Tree Synthesis STA DFT and ATPG Final signoff: physical verification (DRC, LVS, ANT, etc) Required qualifications: Master's Degree in Electrical Engineering / Microelectronics or equivalent At least 1 year of work experience in automatic Place & Route, block level and top Knowledge in digital design and semiconductor fundamentals Knowledge of scripting languages (Perl, Tcl/Tk) Knowledge of one or more steps of the digital design implementation flow (Synthesis, STA, DFT, P&R, equivalence check, CDC) Fluent English communication skills Proactive teamwork attitude Curiosity, ingenuity, passion to develop the best products in their class Desirable qualifications: Knowledge of the various aspects and considerations of Place & Route in full chip and block level flows from RTL to GDS (floor plan, circuit, IR drop and EM prevention, etc) Experience with Cadence P&R flow and tools There is no upper limit in the seniority of this career opportunity, the candidate will be offered the most suitable position ranging from Junior contributor to Principal as adequate.
All INVENTVM positions offer a stake in the company equity that also entitles to receive dividends, competitive benefits, sustainable work logistics aimed in balancing personal life and project deadlines.
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